e269faec13
So far only supports the Archtech Self Learning protocol. Former-commit-id: 705f787fc30459a9d55dc571632dc4d01e7198f0
68 lines
1.8 KiB
C++
68 lines
1.8 KiB
C++
#include "usart.h"
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#include "rf.h"
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#include "buffer.h"
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#include "config.h"
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ISR(TIMER2_COMPA_vect) { //timer2 interrupt 16kHz. Samples the RF Rx data pin
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if (!RFRX) { //if no Radio Rx should be performed
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return;
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}
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uint8_t bit = digitalRead(RX_PIN); // optimized "digital_read(7)" = "PIND & 0x1"
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//will store "lows" on even buffer addresses and "highs" on odd buffer addresses
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if ( ( ((int)bufferWriteP) & 0x1 ) != bit ) { //compare the bit and the buffer pointer address. true if one is odd and one is even.
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//step the buffer pointer
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if ( bufferWriteP + 1 > RF_rxBufferEndP) {
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bufferWriteP = RF_rxBufferStartP;
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} else {
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++bufferWriteP;
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}
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*bufferWriteP = 1; //reset and step once on this addess
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} else {
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if (*bufferWriteP < 255) { //only values up to 255
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++(*bufferWriteP); //step the buffer
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}
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}
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};//end timer2 interrupt
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void setup() {
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Serial.begin(9600);
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pinMode(RX_PIN, INPUT); //set RX pin to input
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pinMode(TX_PIN, OUTPUT); //ser TX pin as output
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//setup timer2 interrupt at 16kHz for RF sampling
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cli();//stop interrupts
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TCCR2A = 0;// set entire TCCR2A register to 0
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TCCR2B = 0;// same for TCCR2B
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TCNT2 = 0;//initialize counter value to 0
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OCR2A = 124;// = ( (16*10^6) / (16000Hz*8pc) ) - 1 (must be <256)
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TCCR2A |= (1 << WGM21); // turn on CTC mode
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TCCR2B |= (1 << CS21); // Set CS21 bit for 8 prescaler
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TIMSK2 |= (1 << OCIE2A); // enable timer compare interrupt
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sei();//allow interrupts
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//reset buffer just to be sure
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for (uint8_t* p = RF_rxBufferStartP; p <= RF_rxBufferEndP; ++p) {
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*p = 0;
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}
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RFRX = true; //start receiving radio data
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};//end setup
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void loop() {
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//Receive and execute command over serial
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parseSerialForCommand();
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//Receive signal over air and send it over serial
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parseRadioRXBuffer();
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};//end loop
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